#ifndef _P347_FPGA_USER_H_
#define _P347_FPFA_USER_H_

#define p347_CHARDEV_NAME		"p347_fpga_device"
#define p347_CHARDEV_NUM		241

//#define PACK16_MODE
#define ADC_DATA_SIZE_WORDS	3
#define ADC_DATA_SIZE_BYTES	ADC_DATA_SIZE_WORDS*2
#define ROT_DATA_SIZE_WORDS	2
#define ROT_DATA_SIZE_BYTES	ROT_DATA_SIZE_WORDS*2

//data pack from FPGA contains 4*2words of data for channels,
//#define DATA_FRAME_SIZE		64
//#define DATA_FRAME_SIZE		128
#define DATA_FRAME_SIZE		256
//count of 2*4 word packets in one dma frame
#define CS67_MODE
//mode when gpmc CS6 and CS7 are outputs to oscilloscope,
//irq_handler uses CS6 and dma_handler uses CS7

typedef struct {
    unsigned int	is_dma;
    unsigned int	word_cnt;
    unsigned short	*data;
}t_gpmc_data;

typedef struct {
    unsigned int	is_dma;
    unsigned int	word_cnt;
    unsigned long	*data_tx;
    unsigned long	*data_rx;
}t_spi_data;

typedef struct {
    unsigned short	control1;
    unsigned short	control2;
    unsigned short	offset;
    unsigned short	gain;
    unsigned short	overrange;
    unsigned short	filt_coeff;
    unsigned short	ch_settings;
}t_adc_params;

typedef struct {
    unsigned short	labels_num;
    unsigned short	averages_num;
}t_rot_params;

//structure for setup_channel ioctl call
typedef struct {
    unsigned char	idx;
    unsigned short	len; //measured in data packs, not bytes
    t_adc_params	apar;
}t_ch_params;

//structure for perform_transfer ioctl call
typedef struct {
    unsigned short*	u_ptr;
    unsigned char	ch_idx;
}t_transfer_params;

typedef struct {
    unsigned short	settings;
}t_fpga_params;

typedef struct {
    unsigned short	us_width;
    unsigned short	us_idle;
    unsigned long	count;
}t_selfgeneration;

#define p347_ADC_CHANNELS_CNT		4
#define p347_ROT_CHANNELS_CNT		4

#define p347_PUMPBUF_MAXRECORDS		2048
#define p347_PUMPBUF_FULLSIZE		4*p347_PUMPBUF_MAXRECORDS

//default spi speeds, should be used in IOCTL_SET_HZ calls
#define p347_SPI_SPEED_48MHZ		48000000
#define p347_SPI_SPEED_24MHZ		24000000
#define p347_SPI_SPEED_12MHZ		12000000
#define p347_SPI_SPEED_6MHZ		6000000
#define p347_SPI_SPEED_3MHZ		3000000
#define p347_SPI_SPEED_1_5MHZ		1500000
#define p347_SPI_SPEED_750kHZ		750000
#define p347_SPI_SPEED_375kHZ		375000
#define p347_SPI_SPEED_187kHZ		187500
#define p347_SPI_SPEED_94kHZ		93750
#define p347_SPI_SPEED_47kHZ		46875
#define p347_SPI_SPEED_23kHZ		23438
#define p347_SPI_SPEED_12kHZ		11719
#define p347_SPI_SPEED_6kHZ		5859
#define p347_SPI_SPEED_3kHZ		2930
#define p347_SPI_SPEED_1_5kHZ		1465

#define p347_SPI_MIN_SPEED		p347_SPI_SPEED_1_5kHZ

//TESTING IOCTL
#define p347_IOCTL_GET_INT_CNT		03
#define p347_IOCTL_GENERATE_PULSE	04

//GPMC IOCTL
#define p347_IOCTL_WRITE		10
#define p347_IOCTL_READ			11

//SPI IOCTL
#define p347_IOCTL_SPI_WRITE		20
#define p347_IOCTL_SPI_SENDCMD		21
#define p347_IOCTL_SPI_SET_HZ		22
#define p347_IOCTL_SPI_READ_REGISTER	23
#define p347_IOCTL_SPI_WRITE_REGISTER	24

//Client Interface IOCTL
#define p347_IOCTL_CLIENT_REGISTER	30
#define p347_IOCTL_CLIENT_UNREGISTER	31
#define p347_IOCTL_CLIENT_SETUP_CHANNEL	32
#define p347_IOCTL_CLIENT_PERFORM_TRANSFER	33
#define p347_IOCTL_CLIENT_CHECK_DATA	34
#define p347_IOCTL_CLIENT_START_CHANNEL	35
#define p347_IOCTL_CLIENT_STOP_CHANNEL	36

//ADC Registers
#define p347_ADC_REG_CONTROL_1		0x1
#define p347_ADC_REG_CONTROL_2		0x2
#define p347_ADC_REG_OFFSET		0x3
#define p347_ADC_REG_GAIN		0x4
#define p347_ADC_REG_OVERRANGE		0x5
#define p347_ADC_REG_STATUS		0x6
#define p347_ADC_REG_FILT_COEFF		0x7
#define p347_ADC_REG_CH_SETTINGS	0x8
//FPGA Registers
#define p347_FPGA_REG_SETTINGS		0x9
#define p347_FPGA_REG_STATUS		0xA
#define p347_FPGA_REG_TEST_READ		0xB
#define p347_FPGA_REG_TEST_WRITE	0xC

#define p347_MAX_REG_NUM		0xC

//SPI Magic Long
#define p347_SPI_MAGIC_LONG		0xC0DEBEEF

//Inner error codes
#define p347_ERROR_SPI_INVAL_OPERATION	300
#define p347_ERROR_SPI_INVAL_ADC_NUM	301
#define p347_ERROR_SPI_INVAL_REG_NUM	302
#define p347_ERROR_SPI_INVAL_ARG	303

#define p347_ERROR_SYSTEM_INVAL_PID	400
#define p347_ERROR_SYSTEM_INVAL_FUN	401
#define p347_ERROR_SYSTEM_INVAL_SETUP	402
#define p347_ERROR_SYSTEM_DEVICE_BUSY	403

#endif
